Author Archives: admin

XYALIS at DAC conference 2017 : booth #2129

-

After 2 years, the long migration started in 2015 has just ended and we are proud to announce that the results are beyond our best expectations. Shrinking geometries, new manufacturing paradigms, exploding file sizes… It’s time to rethink everything! XYALIS …

XYALIS at SPIE Photomask conference 2016

-

XYALIS will demonstrate his integrated Mask Data Preparation flow, including the automatic generation of SEMI P10 Order Forms. Visit us on booth #114 to know more about what we have achieved at the next SPIE Photomoask Technology Conference, September 12-14, 2016, in Monterey, California, …

XYALIS new version of GTmuch makes multi-chip modules and multi-project wafers even easier

-

Paris, France – Xyalis has announced a major upgrade to GTmuch, the company’s graphical tool dedicated to floorplanning and assembly of multiple GDSII databases for Multi-Chip Modules (MCM) and Multi-Project Chips or Wafers (MPC or MPW). At the same time Xyalis has updated its complete suite of GDSII utilities.

STMicroelectronics QUALIFIES XYALIS GTSMOOTH OXIDE THICKNESS ESTIMATION TECHNOLOGY

-

Grenoble, France – XYALIS announced today that STMicrolectronics, after several month of validation, has qualified GTsmooth post CMP oxide thickness estimation capabilities

XYALIS announces GTsmooth, The First Hybrid Metal-Fill Tool

-

Lyon, France – XYALIS, the leading provider of layout finishing tools, today announces GTsmooth, the first hybrid metal-fill tool, which combines the benefits of rules- and model-based methods to increase the manufacturing yield of chips and wafers, to limit the parasitic effects due to dummy insertion, while keeping lowest processing time and database size.