Resources, white papers, articles
Resources Library
Minimizing die fracture in three-dimensional IC
XYALIS, in collaboration with Mosis, has published an article about “Minimizing die fracture in three-dimensional IC advanced packaging wafer thinning process by inserting polyimide patterns”. This result has been presented in the SPIE Advanced Lithography + Patterning, San Jose, California, …
Single-pass frame generation for multi-layer 3D circuits
XYALIS, in collaboration with ST Microelectronics, has published an article about a new methodology to automatically build a single-pass frame for multi-layer 3D circuits.This new methodology uses our frame generation tool GOTframe. This result has been presented in the SPIE Photomask …
Versions history
Here is our tools versions history: GOTsuite_2312-08 Product name Version GOTarc 1.1c GOTcheck 1.6a GOTcif2db 2.2b GOTcross 3.1c GOTcsv2mch 2.1a GOTdb2cif 1.2c GOTdb2ps 1.2d GOTdeck 1.0b GOTdiff 1.4b GOTfig 2.1e GOTfiller 3.2c GOTframe 5.1b GOTghost-shape 2.0d GOTjob2msk 4.4b GOTlabel …
Design Driven Dummy Filling
XYALIS has set up a new methodology to allow an efficient design driven dummy filling technique. It is used in our dummy filling tool GOTstyle. The result has been presented in a paper during the 2021 International Symposium on Electrical, Electronics …
Reducing stress effects on multi-project-wafer reticles
Collaborating with MOSIS by using GOTmuch and GOTfiller, XYALIS has set up a new methodology to MPW yield and control CPI. The result has been presented in a paper during the SPIE Advanced Lithography online conference, California, USA, 22-26 february …
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